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rajashekhar baru
senior physical design engineer
About
Rajashekhar Baru is a highly experienced senior physical design engineer, currently working at Qualcomm. With over a decade of relevant experience in the industry, Rajashekhar has developed a deep understanding of physical design engineering, making him a valuable asset to any team he works with. Rajashekhar started his career at Broadcom, where he worked as a hardware design engineer II. During his time at Broadcom, he gained valuable experience in the field of hardware design, which set the foundation for his future career in physical design engineering. He later moved on to Qualcomm, where he has been working for the past several years. At Qualcomm, Rajashekhar has held multiple positions, including senior GPU physical design engineer, before being promoted to his current role as senior physical design engineer. In his current position, Rajashekhar is responsible for leading the physical design of complex SoCs, ensuring that they meet all performance, power, and area requirements. Rajashekhar holds a Bachelor of Engineering in Electronics and Communication from Visvesvaraya Technological University, as well as a Master of Science in Electrical Engineering from Arizona State University. During his time at Arizona State University, he gained a deep understanding of physical design engineering, which has been invaluable in his career. With over 10 years of relevant experience, Rajashekhar has developed a strong skill set in physical design engineering, including expertise in timing closure, floorplanning, power planning, and physical verification. He is a highly motivated individual, always striving to improve his skills and knowledge, and is dedicated to delivering high-quality work to his team and clients.
Education Overview
• arizona state university
Companies Overview
• qualcomm
• broadcom
• tcs
Experience Overview
11.3 Years
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Experience
Skills
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c
c++
cadence virtuoso
Design
drc
electromigration and ir drop analysis
h spice
html
java
lvs
matlab
microsoft office
modelsim
monte carlo simulation
perl
pnr
sql
verilog
vhdl
vlsi
Contact Details
Email (Verified)
rajXXXXXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXXXXEducation
arizona state university
2011 - 2013
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