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adarsh arora
senior staff design engineer
About
Adarsh Arora is a seasoned Senior Staff Design Engineer with over 17 years of experience in the semiconductor industry. Currently, he is associated with Qualcomm as a Senior Staff Design Engineer and is responsible for designing and developing cutting-edge technology solutions for the company. With a strong background in the industry, Adarsh has previously worked with Texas Instruments as a Senior DFT Engineer and NXP Semiconductors as a Lead IC Design Engineer. During his tenure, he has honed his skills in designing, testing, and validating complex semiconductor systems, including digital, analog, and mixed-signal circuits. Adarsh completed his education from prestigious institutions in India. He earned his Bachelor's degree in Electronics and Communications Engineering from Kurukshetra University, Kurukshetra, and completed his schooling from Doon Public School, New Delhi. Throughout his career, Adarsh has demonstrated a passion for innovation and a deep understanding of the semiconductor industry. He has a proven track record of delivering high-quality products and has been recognized for his exceptional work by his peers and colleagues. As a Senior Staff Design Engineer, Adarsh brings a wealth of experience and expertise to his role. He is a strategic thinker with a strong focus on results and is known for his ability to work collaboratively with cross-functional teams to achieve project goals. He is committed to staying up-to-date with the latest industry trends and technologies and is always looking for ways to improve his skills and knowledge.
Education Overview
• kurukshetra university
• doon public school
Companies Overview
• qualcomm
• texas instruments
• nxp semiconductors
• stmicroelectronics
• semiconductor complex ltd
• dept of information technology govt of india new delhi
Experience Overview
18.5 Years
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Experience
Skills
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application specific integrated circuits
asic
atpg
debugging
Design
dft
fpga
ic
integrated circuit design
jtag
logic synthesis
rtl design
semiconductors
silicon debug
soc
static timing analysis
system on a chip
verilog
very large scale integration
vhdl
vlsi
Contact Details
Email (Verified)
adaXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXXXXEducation
kurukshetra university
1998 - 2002
doon public school
1992 - 1998
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