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ADARSH KAPIL
Software Engineer ll at Microsoft
About
Adarsh Kapil is a highly skilled Software Engineer ll at Microsoft, with a keen interest in hardware acceleration of DBMS time intensive operations using High Level Synthesis on FPGAs. With a Master of Technology degree in VLSI and Embedded Systems from DTU, Delhi, Adarsh has acquired a solid foundation in heterogeneous computing and parallel processing applications using C++, OpenCL, and FPGAs. Currently, Adarsh is working on Spark acceleration with FPGAs at Microsoft, where he is responsible for developing and implementing innovative solutions to improve the performance of DBMS operations. Prior to joining Microsoft, Adarsh worked as a Member of Technical Staff at BigZetta Systems, where he was responsible for hardware acceleration of Big Data operations on FPGA. He has also worked as a Software Engineer at Xilinx, where he gained extensive experience in hardware acceleration on Xilinx FPGAs. Adarsh's educational background includes a Master of Technology degree in VLSI and Embedded Design from DTU and a Bachelor's degree in Electrical, Electronics, and Communications Engineering from Jaypee University. With over 4.45 years of relevant experience in the field, Adarsh has developed a strong skill set in Software Engineering, Spark, and Big Data. Adarsh is a highly motivated and detail-oriented individual who is committed to delivering high-quality work and achieving exceptional results. He is a quick learner, a team player, and has excellent communication skills. Adarsh is always looking for new challenges and opportunities to expand his knowledge and skills in the field of software engineering.
Education
• dtu delhi technological university
• jaypee university of engineering and technology
Companies
• microsoft
• bigzetta systems
• xilinx
• delhi technological university
Experience
6.2 Years
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Experience
Skills
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Apache Spark
Arduino
ARM Cortex-M
Big Data
C
C (Programming Language)
C++
Database Management System (DBMS)
DBMS
Design
Digital IC Design
Embedded C
Embedded Systems
Hardware
High Level Synthesis
Integration
Microsoft Azure
Microsoft Word
ModelSim
modelsim
operations
Programming
Python
Python (Programming Language)
QuestaSim
RTL Coding
Software Engineer
system verilog
Verilog
Very-Large-Scale Integration (VLSI)
VHDL
vlsi
Xilinx
Xilinx ISE
Xilinx Vitis
Contact Details
Email (Verified)
kapXXXXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXXXXEducation
dtu delhi technological university
Master of Technology - MTech
2016 - 2018
jaypee university of engineering and technology
Bachelor’s Degree
2011 - 2015
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