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Akshath Bhat
Silicon Design Engineer at AMD
Education
• university of southern california
• visvesvaraya technological university
Companies
• amd
• cadence design systems
• wipro
• lsi
• indian institute of science
Experience
11.4 Years
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Experience
Skills
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Altera
ASIC
Cadence Encounter
Cadence Virtuoso
Clock Tree Synthesis
CMOS
Design
design compiler
DRC
EDA
FPGA
IC
infra
Infrastructure
Integrated Circuit Design
IP
Logic Design
LVS
ModelSim
Perl
Physical Design
Physical Verification
placement and optimizations
Primetime
RTL coding
RTL Design
Shell Scripting
Signal Processing
SoC
soc
Software Engineer
Static Timing Analysis
Synopsys tools
SystemVerilog
TCL
test
Timing Closure
Verilog
VHDL
VLSI
Xilinx ISE
Contact Details
Email (Verified)
bhaXXXXXXXXXXXXXomMobile Number
+91XXXXXXXXXXEducation
university of southern california
Master of Science (M.S.)
2013 - 2014
visvesvaraya technological university
Bachelor of Engineering (B.E.)
2007 - 2011
Frequently asked questions
What company does Akshath Bhat work for?
Akshath Bhat works for amd
What is Akshath Bhat role in his workplace?
Akshath Bhat's role in his workplace is Senior Member of Technical Staff
What is Akshath Bhat's tenure in his workplace?
Akshath Bhat's tenure in his workplace is 3.92 years
What is Akshath Bhat's total experience?
Akshath Bhat's total experience is 11.42 years
What is Akshath Bhat's LinkedIn profile?
What is Akshath Bhat's email address?
What is Akshath Bhat's phone/WhatsApp number?
What schools did Akshath Bhat attend?
Akshath Bhat has attended university of southern california, visvesvaraya technological university
What companies has Akshath Bhat worked with?
Akshath Bhat has worked with amd, amd, cadence design systems, wipro, lsi, indian institute of science
What are some of Akshath Bhat's skills?
Akshath Bhat has skills in Altera, ASIC, Cadence Encounter, Cadence Virtuoso, Clock Tree Synthesis, CMOS and more.
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