About

Amulya Murthy is an experienced Recruitment professional with a focus on VLSI Engineers. With 3 years of experience in Recruitment, she is currently working as an Associate III - TR at UST, where she is responsible for hiring PD, STA, DFT, DV, Analog, Memory, FPGA, and RTL Engineers. Prior to her current role, Amulya worked as a Talent Acquisition Executive at Whizchip Design Technologies Pvt Ltd, where she served over 15 global customers in their challenging SoC and ASIC design projects. During her tenure, she owned DDR2, DDR3, and PCI Express GenII design, verification emulation, and silicon bring-up for one of the first silicon vendors who brought DDR2/DD3 and PCIExpress controllers into the market. She also has experience with 35 tape outs for one premier customer and 15 patents for verification team. Additionally, she has complete ownership of the Physical Design Lower node Technology - 7nm (Netlist to GDSII) and Full chip Integration. Before joining Whizchip, Amulya worked as an Associate - TA at Eximius Design, a fast-growing Design Service company in ASIC VLSI industry. During her four years at Eximius, she gained experience working with 800+ employees and four branches across the globe (USA, Malaysia/Singapore, Hyderabad, Bangalore). Amulya holds a Bachelor's degree in Information Science from Vishveshwaraiah Technological University, which she completed in 2012. Her relevant experience in the industry is 6.85 years, and she has a strong background in Integration. Amulya is always looking for talented VLSI Engineers to join her team and can be reached at amulya.kj@ust.com.