About

Anil Sharma is an experienced Lead Design Engineer at Cadence Design Systems with a strong background in design verification engineering. He has worked with CR&D teams at Qualcomm Technologies and ST Microelectronics, demonstrating his expertise in UVM, System Verilog, and verilog. Anil holds a Master of Technology (M.Tech.) degree in Very Large Scale Integration from Amity University India. With over 8 years of relevant experience in the field, Anil has developed a range of skills and knowledge that make him a valuable member of any design team. He has previously worked as a Senior Design Verification Engineer at Smartplay Technologies and as a Design Verification Engineer at Qualcomm India, where he worked on-site with the CR&D team. Anil's education history includes a Bachelor of Technology (BTech) degree in Electrical, Electronics and Communications Engineering from UPTU and a Master of Technology (M.Tech.) degree in Very Large Scale Integration from Amity University India. Anil's tech stack includes integration, and he is a strong engineering professional with a passion for design verification engineering. He has a proven track record of delivering high-quality work and is committed to staying up-to-date with the latest developments in his field. Anil is a valuable asset to any team, and his expertise and passion for design engineering make him an excellent choice for any design project.