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Anmol Agarwal
ASIC Digital Design Engineer at Synopsys Inc | Ex-IP Design Intern at STMicroelectronics | M.Tech VLSI Design @TIET' 22
About
Anmol Agarwal is an ASIC Digital Design Engineer at Synopsys Inc, with a strong background in VLSI Design and Electronics & Communication. He is a tech enthusiast with a great interest in the design and architecture of IPs and SoCs. With a Master of Technology degree in VLSI Design from Thapar University, Patiala, and a Bachelor of Technology degree in Electronics & Communication from AKGEC, Ghaziabad, Anmol has gained a strong foundation in his field. In his current role, Anmol is responsible for CDC, RDC & LINT checks for the full physical layer of serdes IPs using Spyglass & VC Spyglass, writing & analyzing constraints, debugging & RTL coding for PHY in Verilog, and Perl/shell MakeFile scripting. He has also worked as an IP Design Intern in Automotive Discrete Group (ADG) Department at STMicroelectronics, Greater Noida, where he gained a good understanding of Frontend IP design flow, SoC & Parameterized Xml flows, Design Automation using python scripting and pandas dataframe. Anmol has hands-on experience in CDC & LINT at IP level, IP Directory structure, RTL coding, STA concepts, key understanding of CDC setup, Good knowledge of AMBA (APB & AHB) protocols and its Physical & Logical port mapping & Deep understanding of different types of IPs & their Database. He is proficient in tools such as Magillem tool for integration of IPs to build XMLs, Synopsys Spyglass for CDC & LINT checks, Fpga Synthesis - Xilinx ISE & ModelSim, LTSpice, Xilinx Vivado, Keil. He is also well-versed in programming languages such as C, C++, Verilog/VHDL, System Verilog, Perl (basics), C shell & Python scripting languages, and protocols such as AHB, AXI, APB. He has experience working on platforms such as Windows, LINUX, UNIX. Apart from his technical skills, Anmol has also worked as an Analyst at Skylever Education Solutions LLP, where he built a learning management software system for enhancing e-learning using PyCharm in Python. He has a relevant experience of 2.36 years, and his Tech Stack includes Designer, Python, Frontend, Pandas, Integration, and Web. Anmol's passion for learning and technology makes him a valuable asset to any team.
Education
• thapar institute of engineering technology
• ajay kumar garg engineering college ghaziabad
Companies
• synopsys
• stmicroelectronics
• skylever education solutions llp
• bsnl
Experience
3.3 Years
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Skills
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architecture
asic
Automation
Communication
Debugging
Design
Education
Electronics
IP
Perl
Pycharm
Python
soc
Verilog
Very-Large-Scale Integration (VLSI)
vlsi
Web
Contact Details
Email (Verified)
agaXXXXXXXXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXXXXEducation
thapar institute of engineering technology
Master of Technology (M.Tech) - VLSI Design & Embedded systems
2020 - 2022
ajay kumar garg engineering college ghaziabad
Bachelor of Technology (B.Tech) - Electronics & Communication
2013 - 2017
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