About

Anurag Atmakuri is an experienced Physical Design Engineer with a passion for learning and exploring new areas. He currently works at Cirrus Logic as a Physical Design Engineer, where he utilizes data analytics to provide insights into hardware designs, with a focus on facilitating data-driven decisions for faster design turnaround times. Anurag has a keen interest in technical and business blogging, and his work can be found on his Medium page. Anurag's expertise lies in physical design at the subsystem and partition level, as well as uncore partitions within Xeon Phi products. He has worked on the Nervana Crest product line, comprising of KnightsCrest and RiverCrest, where he owned a crucial part of the design responsible for the asynchronous interface between Core and HBM. He has also worked on the only multi-power domain/multi-clock domain design in the NNP core. His key areas of focus include UPF design, power grid implementation, async FIFO placement, and timing. Anurag is a mentor at heart and enjoys guiding students on how to approach their careers and life in general. He is always open to helping others and encourages people to reach out to him about anything. He is constantly experimenting with different techniques, including software tools and meditation, to increase his productivity and improve his quality of life. Anurag holds a Master's degree in Electrical and Electronics Engineering from the University of Southern California and a Bachelor of Engineering degree in Instrumentation and Control Engineering from Manipal Institute of Technology. He has 8.19 years of relevant experience in the field and is skilled in designer software.