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Anurag Goyal
Digital ASIC/FPGA Design | IP Design Engineer at Google | 6+ years experience
Education Overview
• university of southern california
• nit kurukshetra national institute of technology kurukshetra
Companies Overview
• xilinx
• signal laboratories inc.
• jio
• technical university of ilmenau
• solid state physics laboratory defense research development organisation
Experience Overview
8 Years
Find anyone’s contact
Experience
Hardware Engineering Intern
signal laboratories inc. | Menlo Park, California, United States
2016 - 2017
Research Intern
solid state physics laboratory defense research development organisation | New Delhi, Delhi, India
2012 - 2012
Skills
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Application-Specific Integrated Circuits (ASI
architecture
arm
Artificial Intelligence (AI)
C
C++
Cadence Encounter
Cadence Virtuoso
CMOS
computer architecture
Computer Hardware
Design
designer
DFT
Digital Circuit Design
DRC
Electronics
Engineering
Ethernet
Field-Programmable Gate Arrays (FPGA)
firmware
FPGA
Git
HSPICE
infra
Infrastructure
IP
LTE
Matlab
P&R
Perl
R
RTL Design
rtl design
Signal Integrity
soc
Static Timing Analysis
Synopsys Primetime
System on a Chip (SoC)
SystemC
SystemVerilog
test
Testing
testing
Verilog
Version Control
Very-Large-Scale Integration (VLSI)
VHDL
Xilinx
Contact Details
Email (Verified)
anuXXXXXXXXXXXXXXXXXomMobile Number
213XXXXXXX57Education
university of southern california
Master’s Degree
2015 - 2017
nit kurukshetra national institute of technology kurukshetra
Bachelor of Technology (B.Tech.)
2010 - 2014
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