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Arpit Jain
DSP Algorithms | 5G PHY
About
Arpit Jain is a Signal Processing algorithms engineer and enthusiast with over 8 years of relevant experience. He has the ability to develop and implement DSP algorithms directly from research papers/specifications and has hands-on experience in development and implementation of Physical Layer for 5G New Radio. Arpit has a good understanding of 3GPP specifications and implementation experience on ORAN Alliance's Open Fronthaul specification. He is currently working as a Lead Engineer at Verana Networks. Arpit is well-versed with development and implementation of DSP algorithms for audio processing. He has experience in multi-microphone audio processing, beamforming, voice activity detectors, echo canceler's and noise cancellation. Previously, Arpit worked as a Research Engineer at Wisig Networks where he was responsible for the development and implementation of Physical Layer for 5G New Radio. He also worked on fixed+float point development, implementation, verification, and testing of both uplink and downlink PHY channels. Arpit has experience in PUSCH Receiver(MIMO), PRACH receiver, PRACH transmitter, PSS/SSS receiver, L1 Mapper/De-Mapper, L1 controller, FAPI, ORAN's open fronthaul C, U and S plane plane messages, delay management, transmission and reception windows, ECPRI headers, IQ compression/De-Compression, micro-architecture for FPGA implementation, and overall Base Station/UE implementation architecture. Arpit has also worked as a Senior Software Development Engineer at Meeami Technologies where he was responsible for the development and implementation of audio/speech enhancement algorithms for microphone arrays. He has developed, modified, and implemented various beamforming algorithms (D&S, Differential, MVDR, etc.) for circular, linear, and rectangular microphone arrays. Arpit has devised a test plan and performance measures for testing the beamformer’s performance and improved the performance iteratively taking inferences from the tests. He has developed a robust low complexity Direction of Arrival(DoA) algorithm for circular microphone array, tested it in the presence of different noises, and found it to be robust to the noises. Arpit has also developed Voice Activity Detector(VAD) which works very well even in the presence of very high non-stationary noise. He has developed and implemented frequency domain Filter for suppressing residual noise left over from Beamformer. Arpit completed his Bachelor of Technology (B.Tech.) in Electrical Engineering from the Indian Institute of Technology, Hyderabad in 2014
Education
• iit hyderabad indian institute of technology hyderabad
Companies
• verana networks
• wisig networks
• meeami technologies
• imagination technologies
• indian institute of technology
• tata steel
Experience
9.8 Years
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Algorithms
architecture
C (Programming Language)
Field-Programmable Gate Arrays (FPGA)
FPGA
Research
Research Scientist
Senior Software Engineer
Software Engineer
test
testing
Windows
Contact Details
Email (Verified)
ee1XXXXXXXXXXXXXomMobile Number
+91XXXXXXXX51Education
iit hyderabad indian institute of technology hyderabad
Bachelor of Technology (B.Tech.)
2010 - 2014
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