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Arun Kumar
Physical Design Engineer
About
Arun Kumar is an accomplished Physical Design Engineer with over 15 years of experience in the field. Currently, he is working at Amazon as a Physical Design Engineer. He is an expert in designing and implementing high-performance, low-power, and area-efficient digital and mixed-signal circuits. Before joining Amazon, Arun worked as a Principal Physical Design Engineer at Inphi Corporation, where he was responsible for leading the design and implementation of complex digital and mixed-signal circuits for high-speed communication systems. Prior to that, he worked as a Senior Physical Design Engineer at Clariphy Communications, where he played a key role in the development of high-speed optical communication systems. Arun has a strong educational background, having completed his Master's degree in Electrical Engineering from Stanford University. He also holds a Bachelor's degree in Electrical Engineering from the Indian Institute of Technology, Roorkee. During his time at Stanford, he gained valuable experience in designing and implementing complex digital and mixed-signal circuits. Throughout his career, Arun has demonstrated his ability to work effectively in fast-paced environments, delivering high-quality results within tight deadlines. He is a skilled communicator and collaborator, with a proven track record of working successfully with cross-functional teams. In summary, Arun Kumar is an experienced Physical Design Engineer with a strong educational background and a proven track record of delivering high-quality results. He is a valuable asset to any organization looking for a skilled and experienced engineer to lead the design and implementation of complex digital and mixed-signal circuits.
Education Overview
• stanford university
• iit roorkee indian institute of technology roorkee
Companies Overview
• amazon
• inphi corporation
• clariphy communications
• netlogic microsystems
• apple
• texas instruments
Experience Overview
16.8 Years
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Experience
Skills
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application specific integrated circuits
arm
arm architecture
asic
c++
clock tree synthesis
Design
dft
digital signal processors
eda
ic
low power design
machine learning
perl
Perl
physical design
place %26 route
processors
python
Python
redhawk
rtl design
semiconductors
soc
static timing analysis
system on a chip
tcl
TCL
testing
timing closure
verilog
very large scale integration
vlsi
Contact Details
Email (Verified)
aruXXXXXXXXXXXXXXXXomMobile Number
+16XXXXXXX52Education
stanford university
MS
2007 - 2009
iit roorkee indian institute of technology roorkee
Bachelor of Technology (B.Tech.)
2001 - 2005
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