https://dream.weekday.works/redirectToHiringCopilotExtension/

Designed externalizable generic read plane APIs for a new service which was required to improve data transparency of Vendor Returns payment lifecycle

Revamped Amazon Vendor Returns Payments Website and handled various technical challenges concerning direct customers. The new UI reduced number of clicks and improved the transparency.

NBC Capital

Australian Water system is the manufacture of polyethylene rainwater tanks, agricultural products, and chemical storage tanks. These products are used in industries and environmental sector companies.

Worked on Engineering Change Order which aims
to reduce compile time by 80 percentage for localized
changes in large designs and generating exactly same
results.
Optimized mutual exclusivity approach in Low Power
instrumentation which improved long path cycle detection
algorithm and operating frequency of the Emulator by 10
percentage in C++ language.
Developed a new flow for segregation of debug and actual
logic information which significantly improved the compile
time by 30 percentage for pipelined stages mainly in C++
language and Linux environment.
Developed resolution strategy for inconsistent behavior of
wires with multiple drivers.
Solved top end critical customer issues within strict
deadlines using GNU debugger.

Elliott Management

Greylock

Battery Ventures

Venrock

Sutter Hill Ventures

Bruggere Capital

Mentor Graphics is a developer of software tools for electronic design automation. The company offers tools for electronic design automation, embedded systems development, FPGA synthesis, electrical systems, cabling & harness design, and simulation tools for analog mixed-signal design. Its mechanical analysis division offers tools for fluid dynamics and heat transfer, thermal characterization and Thermal Interface Material (TIM) Measurement equipment, Flowmaster, and CADRA design drafting tools. Mentor Graphics is the only EDA company with an embedded software solution.

Developer of software tools for electronic design automation

Serialized and converted a synthesized logic network data
structure to other similar light version for very fast graph
traversals and less memory foot print.
Added support for sequential wildcard string expansion of
command line arguments for various stages of the VELOCE
tool.
Automatic simulation and verification of Design
components using Shell script generated test models.

Joint General Secretary of one of the five councils of IIT(BHU) named Social Service Council with utter responsibility of decision making ,fund management and guidance.Handled group of around 150.

Indian Institute of Technology (BHU) Varanasi is a premier research and engineering institute located in Varanasi, Uttar Pradesh, India. Founded in 1919, the institute is spread over an area of 400 acres within the larger 1400 acre campus of Banaras Hindu University. IIT (BHU) Varanasi has 14 departments and 3 inter-disciplinary schools with a total student population close to 5000. It is the only IIT which is associated with a university i.e. Banaras Hindu University.

Register Transfer Level Modelling of Design Ware components
Verification of Synopsys components and Register Transfer Level model susing software simulation tool ModelSim in various Hardware Description Languages.
Emulation with script generated Test benches using software tool Veloce.


Teaching assistant for the course "Fundamentals of Electrical Engineering" and "Basics C Programming Language" for total 3 semesters for a batch of size 120 students.