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athman beidalah

platform software and hardware validation engineering program manager

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About

Athman Beidalah is an accomplished Platform Software and Hardware Validation Engineering Program Manager with over 36 years of relevant experience in the technology industry. He is currently employed at Intel, where he holds the same position as his LinkedIn headline. Beidalah is responsible for overseeing the validation of both software and hardware on Intel's platforms. Beidalah has held various positions at Intel throughout his career. He previously served as Engineering Manager for Datacenter Xeon Phi Server Research and Development Platforms and Staff Product Development Solution Development System Quality and Reliability Engineering. These roles have allowed him to gain extensive experience in product development, system quality, and reliability engineering. Beidalah is a graduate of the University of Washington, where he received his education in the field of computer science. He completed his degree in 1978 and has since been using his knowledge to make significant contributions to the technology industry. In addition to his educational background and professional experience, Beidalah is also proficient in various technical skills. He is a Research Scientist and a Senior Software Engineer, which has allowed him to gain a deeper understanding of the technology industry. Overall, Athman Beidalah is an accomplished and experienced Platform Software and Hardware Validation Engineering Program Manager with a proven track record of success. His extensive experience in product development, system quality, and reliability engineering makes him an invaluable asset to Intel.

Education

university of washington

Companies

intel

Experience

37.4 Years

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Experience

platform software and hardware validation engineering program manager

intel | santa clara, california, united states

2016 - 2022

engineering manager - datacenter xeon phi server research and development platforms

intel | santa clara, california, united states

2015 - 2022

staff product development solution development system quality and reliability engineering

intel | santa clara, california, united states

2011 - 2012

chipsets product development engineering manager

intel | santa clara, california, united states

2001 - 2010

telecommunication products quality and relibility engineering manager

intel | santa clara, california, united states

2000 - 2000

process engineer

intel | santa clara, california, united states

1978 - 1994

Skills

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analog

analog circuit design

asic

circuit design

cmos

debugging

dft

eda

electronics

failure analysis

Hardware

hardware architecture

ic

integrated circuits

integration

intel

low power design

manufacturing

microprocessors

mixed signal

physical design

process improvement

processors

product development

Product Development

product engineering

quality management

quality system

Research

Research and Development (R&D)

Research Scientist

rtl design

semiconductor industry

semiconductors

silicon

soc

software development

spc

start ups

telecommunications

testing

verilog

very large scale integration

vlsi

yield

Contact Details

Email (Verified)

a.bXXXXXXXXXXXXXXXXXet

Mobile Number

+19XXXXXXX89

Education

university of washington

1974 - 1978

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