About

Bhawana Singh is an experienced ASIC Design Engineer currently working with Ericsson. With over 8 years of relevant experience, she has a demonstrated history of working in the information technology and services industry. Bhawana is skilled in Research and Development (R&D), Analog Circuits, Electronics, CMOS, and Xilinx ISE. She is a strong engineering professional who holds a M.tech degree focused in VLSI Design from Malaviya National Institute of Technology Jaipur. Prior to her current role, Bhawana worked as an Application Engineer II at Synopsys where she was a part of the Digital Design group. Her responsibilities included resolving issues related to Synthesis (Design Compiler), Logic equivalence check (Formality) and timing analysis (Prime time/GCA) to NXP Semiconductor and ST Microelectronics. She also has basic knowledge about physical design flow (ICC2). Bhawana started her career as a Physical Design Intern at Synopsys. Bhawana's educational background includes a M.tech degree in VLSI Design from Malaviya National Institute of Technology Jaipur and a B.tech degree in Electronics and Communication from Govt. Women Engineering College, Ajmer. Apart from her professional experience, Bhawana is a Research Scientist and has a keen interest in research and development. She is a skilled professional with a strong technical background and a passion for innovation.