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BIPLAB PAL
Principle Engineer (Analog Layout)at Cadence Design System
Education
• bits pilani birla institute of technology and science
• makaut west bengal university of technology kolkata
• arambagh high school
Companies
• cadence design systems
• altran
• sankalp semi
• masamb electronics systems
Experience
9.1 Years
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Experience
Skills
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Analog
Analog Layout
Analog Layout,PLL,BANDGAP,LDO,RF Layout
apache
ASIC
asic
CAD
CAD Tools
Cadence Software
Cadence Virtuoso
Communication
Computer Simulations
Computer-Aided Design (CAD)
Debugging
Design
designer
EDA
eda
Electronic Circuits
Electronic Engineering
Electronics
Graphics
IC Layout
Integrated Circuits (IC)
Integration
IP
Java Database Connectivity (JDBC)
JDBC
Logic and Reasoning
Mixed Signal
Perl
Perl Script
Physical Design
Program Skills
Project Management
Research
Research Scientist
Routing
Schematic Capture
Semiconductor Engineering
Shell Scripting
Signal Integrity
simulations
SoC
soc
TCL
Unix
Unix Shell Scripting
unix shell scripting
Very-Large-Scale Integration (VLSI)
VHDL
VLSI
vlsi
VLSI CAD
Windows
Contact Details
Email (Verified)
bipXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXX97Education
bits pilani birla institute of technology and science
Master of Technology - MTech
2019 - 2021
makaut west bengal university of technology kolkata
B.TECH
2006 - 2010
arambagh high school
Bachelor of Science (B.S.)
1997 - 2005
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