About

Chaitanya Srikar is a highly skilled GPU Architecture Modelling Engineer with over 15 years of experience in software development and EDA tool development. Currently working at AMD as an SMTS, Chaitanya has a proven track record of developing best user interface options for configuring ASIC blocks inside SOC (FPGA), providing frameworks to generate designs, and simulating designs using configured blocks. He is also adept at testing and analyzing FPGA flows and improving performance by profiling the tool. Chaitanya has previously worked as a Staff Engineer at Microchip India Pvt Ltd and as a Senior Software Engineer at Microsemi India Pvt Ltd. During his time at Microsemi India Pvt Ltd, he was responsible for migrating the front-end part of timing and power analysis tools from MFC to QT framework, testing and fixing issues after migration, and porting timing and power analysis tools from 32-bit to 64-bit executable. He also has a good understanding of the Qt framework with version 4.6.6 and 5.0 for developing the front-end part of the tool, software design, and software development life cycle. Chaitanya uses design patterns for software design and has a good understanding of MVC architecture. He also has a good understanding of Verilog. Chaitanya holds a Master's degree in Embedded Systems from MAHE and a Bachelor of Technology (B.Tech.) in Electronics and Communication Engineering from JNTU. His technical skills include software engineering and front-end development. Chaitanya's expertise in EDA tool development and GPU architecture modelling make him a valuable asset to any organization he works with.