damien pesme
senior physical design engineer
About
Damien Pesme is a highly experienced Senior Physical Design Engineer currently working with Apple. With almost 9 years of relevant experience in the field, he has proven himself to be a valuable asset to the companies he has worked for in the past. Prior to joining Apple, Damien worked with Intel as both a Digital Design Engineer and a Physical Design Engineer. During his time at Intel, he gained a wealth of knowledge and experience in these areas, which he has since brought to his current role at Apple. Damien obtained his education from the École des Mines de Saint-Étienne, where he studied from 2010 to 2013. He also attended Lycée Adam de Craponne from 2005 to 2007. His educational background has provided him with a strong foundation in the field of physical design engineering, which he has built upon throughout his career. As a Senior Physical Design Engineer, Damien is responsible for designing and implementing physical layouts for complex integrated circuits. He is an expert in the use of industry-standard physical design tools and methodologies, and is able to work effectively both independently and as part of a team. His attention to detail and ability to solve complex problems make him a valuable asset to any project he is involved in. Overall, Damien Pesme is a highly skilled and experienced Senior Physical Design Engineer with a proven track record of success. He is committed to delivering high-quality work and is always looking for ways to improve his skills and knowledge in the field.
Education
• cole des mines de saint tienne
• lyce adam de craponne
Companies
• apple
• intel
• sondrel ltd
• insidesecure
• dassault aviation
Experience
10.3 Years
Experience
pdk and design flow apprentice
insidesecure | meyreuil, provence-alpes-cote d'azur, france
2010 - 2013
Skills
Boost your visibility and stand out to employers with referrals from your LinkedIn connections.
analogue
application specific integrated circuits
architecture arm
asic
c
c++
cadence
cadence virtuoso
clock tree synthesis
cmos
conception de circuits analogiques
conception des circuits
conception physique
cross functional team leadership
debuggage
Design
design flow
design rule checking
dft
eda
educational leadership
floorplanning
fpga
ic
integrated circuits
integration
layout versus schematic
lint
linux
logic synthesis
microprocesseur
mixed signal
pdk
pdk development
perl
physical design
physical verification
place and route
power analysis
processeurs
pspice
r&d
redhawk
respect des contraintes temporelles
rtl design
script shell
semi conducteur
semi conducteurs
semiconductors
signal integrity
silicium
simulations
soc
static timing analysis
synopsys primetime
system on a chip
tcl
teamwork
timing closure
upf
verilog
Contact Details
Email (Verified)
dpeXXXXXXXXXXXomMobile Number
+15XXXXXXX73Education
cole des mines de saint tienne
2010 - 2013
lyce adam de craponne
2005 - 2007
Find anyone’s contact and let Weekday reach out to them on your behalf
Start hiring nowStop manually filling job applications. Use AI to auto-apply to jobs
Look for jobs now