About

Dhruv Garg is a highly skilled Senior Member of Technical Staff at Mentor Graphics with over 3 years of relevant experience. He is a specialist in Design Rule Check (DRC), Layout Versus Schematic (LVS), Verilog, Silvaco, Cadence Virtuoso, and VLSI CAD. Dhruv holds a Master of Technology degree in VLSI Design from Dr B R Ambedkar National Institute of Technology, Jalandhar. Dhruv's passion for his work is evident in the various projects he has undertaken in the field of Analog Circuit Design, Digital Circuit Design, and FPGA based Verilog project implementation. He believes in pursuing his interests to get the best out of himself. Dhruv's professional journey began as a Verification Intern at Mentor Graphics, where he gained valuable experience in the field. He then went on to become a Teaching Assistant at Dr B R Ambedkar National Institute of Technology, where he honed his skills further. Dhruv's education history is impressive, having completed his Bachelor's degree in Electronics and Communication Engineering from Jaypee Institute of Information Technology and his Master's degree in VLSI Design from Dr B R Ambedkar National Institute of Technology, Jalandhar. Dhruv's Tech Stack includes Software Engineering, which he is well-versed in. He is a dedicated and hardworking individual who is constantly striving to improve his skills and knowledge in his field.