About

Dinesh Udayakumar is a highly skilled Senior ASIC Design Engineer with over 7 years of relevant experience. Currently working at Intel as a Senior ASIC Design Engineer, he has previously held positions as a Senior Logic Design Engineer and Graduate Technical Intern at the same company. Dinesh Udayakumar has a strong educational background, having completed his Bachelor's degree in Electronics and Communication Engineering from Thiagarajar College of Engineering, Madurai, and his Master's degree in Electrical Engineering from the University of Southern California. He also completed his schooling at St. Paul's Matriculation Higher Secondary School. He has a deep understanding of various technologies and has proven expertise in Research Science. He is an expert in ASIC design and has significant experience in logic design. He also has a strong understanding of verification methodologies and has worked on several projects in this area. Dinesh Udayakumar is an excellent team player and has demonstrated strong leadership skills in his previous roles. He is known for his attention to detail and his ability to work under tight deadlines. He is also a quick learner and is always willing to take on new challenges. Overall, Dinesh Udayakumar is a highly skilled and motivated Senior ASIC Design Engineer with a strong educational background and extensive experience in the industry. He is an asset to any team and is always looking for ways to improve his skills and knowledge.