Dr. Shelly Garg, PhD
Lead Solutions Engineer, Cadence || Ph.D. Graduate, IIIT-Delhi || UGC-NET & JRF Qualified || Researcher || Teacher || Author
Education
• iiit delhi indraprastha institute of information technology delhi
• indira gandhi delhi technical university for women
• dr akhilesh das gupta institute of technology management
Companies
• cadence design systems
• iiit
• indian institute of technology delhi
Experience
2.5 Years
Experience
Skills
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Analog Circuit Design
Analog Circuits
Analog Integrated Circuit Design
C++
Cadence Virtuoso
Design
Device
Device Design
Digital Designs
Embedded Systems
Integrated Circuit Design
Low-power Design
Matlab
Microsoft Office
Music
Orcad Capture
Research
Research Scientist
Semiconductor Device
System Verilog
teaching
Verilog
Very-Large-Scale Integration (VLSI)
VHDL
vlsi
Contact Details
Email (Verified)
sheXXXXXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXX19Education
iiit delhi indraprastha institute of information technology delhi
Doctor of Philosophy (PhD)
2016 - 2022
indira gandhi delhi technical university for women
Master of Technology (M.Tech.)
2013 - 2015
dr akhilesh das gupta institute of technology management
Bachelor of Technology (B.Tech.)
2009 - 2013
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