About

Evam Gilotra is an experienced FPGA Engineer with a background in research and development. He is currently working at drut technologies inc, where he is responsible for designing and verifying the datapath of PCIe over optical for disaggregated cloud infrastructure. Evam has expertise in using Xilinx FPGA boards such as Zynq UltraScale+ and Virtex UltraScale+ with Xilinx toolchain such as Vivado, SDK, and petalinux. He is well-versed in protocols such as PCIe, Aurora 64/66B, AXI, and I2C. Evam has experience working with DDR4. Before joining drut technologies inc, Evam worked as a Research Assistant at fzi forschungszentrum informatik, where he designed an IP core to make AES 256 encryption resistant to power analysis based side-channel attack by periodically changing s-box used for encryption using runtime partial reconfiguration. He also worked as a Research Intern at karlsruhe institute of technology, where he explored Partial Reconfiguration through JTAG, PCAP, and ICAP and ported an already existing custom reconfiguration controller from Zynq 7000 to Zynq UltraScale+ for a framework for Mixed-Criticality System. He also designed and synthesized a hardware accelerator for matrix multiplication to speed up Convolution Neural Network-based Machine Learning algorithms. The accelerator was 140 times faster as compared to single-core ARM. Evam holds an Engineer’s Degree in MSc (Hons) Biological Sciences and B.E.(Hons) Electronics & Electrical from Birla Institute of Technology and Science, Pilani. He completed his high school education from Bal Bharati Public School, Pitampura, Delhi. Evam's technical skills include research, infrastructure, machine learning, and neural networks. He has relevant experience of 2.94 years in the field of FPGA engineering.