About

Gobind Prasad is a Lead Software Engineer at Cadence Design Systems with over 6 years of experience in Hardware Design & Verification in various domains such as IOT, Embedded, Consumer Electronics, Automotive & Medical. He has an extensive skill set in Verilog HDL and System Verilog HVL and has worked on SV Assertion based verification. He has also completed a course on Emulation using VELOCE by Siemens (Mentor Graphics). Gobind is well-versed in designing hardware architecture, analog circuit design/simulation, and schematics creation in Cadence Orcad tool. He has also performed board verification (BVT) & design verification (DVT) tests using high-frequency DSO/logic analyzer and created test documents for the same. He has experience in risk analysis (DFMEA/CFMEA), stress analysis, value engineering value analysis for the products/module/PCBs in the field of Medical & consumer electronics domain. Some of his notable achievements include designing a complete eUSB2 protocol (Phy Layer) from scratch with NRZI Data Encoding/Decoding, bit stuffing/unstuffing, and Serdes for 8-bit UTMI interface, with low power features implementation. He has also completed the verification of the eUSB2 protocol over USB3.1 fabric in Xcelium simulator and Palladium emulator for all types of transactions (bulk, isochronous, interrupt, and control transfers) and low power verification (sleep/suspend). He has worked on USB4 Protocol, TMU design and verification of several blocks of Transport & Logical layer, and PCIe protocol in verification of several blocks. Gobind holds a Bachelor of Technology (BTech) in Electrical Engineering from the Indian Institute of Technology, Delhi. He has worked as an ASIC Verification Engineer at Altran and as a Member of Technical Staff at HCL in the past. Overall, with 8.95 years of relevant experience, Gobind Prasad is a highly skilled Lead Software Engineer with expertise in Hardware Design & Verification and a strong understanding of digital design fundamentals and ASIC/SOC design flow.