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Harsh Chawada
Train Control and Management System
About
Harsh Chawada is an experienced embedded software application engineer with a diverse background in rolling stock software, SoC validation, and IoT. With over 7 years of experience, he has worked in all stages of the development cycle, from writing specifications and requirements to programming, testing, and debugging in an agile environment. Harsh is well-versed in multiple programming languages such as IEC61131-3, Embedded C, PLC, Verilog, and Python. He is also knowledgeable about multiple communication protocols such as MVB, TCP/IP, UART, I2C, and SPI. Currently working as a Software Application Engineer - Train Control and Management System at Alstom, he has gained valuable experience in designing and developing train control application software for rolling stock in an Agile/Scrum environment, in line with EN 50657 standard, and has a good understanding of schematic diagrams. In his previous role as a Senior Software Developer at VVDN, Harsh worked on functional validation of ARM architecture-based automotive SoC at NXP Semiconductor. He was also responsible for creating test case plans, writing code for each test case, and troubleshooting and bug fixing. Harsh has also worked on the Roambee Tracker project, which provides real-time visibility of stationary or in-transit goods and assets to better monitor supply chain logistics. Harsh holds a Bachelor of Technology degree in Information and Communication Technology from DA-IICT. He is proficient in Python and has experience working as a software engineer. With a total of 9.45 years of relevant experience, Harsh is a skilled and knowledgeable software application engineer who is always looking to expand his skill set and take on new challenges.
Education
• daiict
Companies
• alstom
• bombardier
• vvdn
• ecolibrium
• daiict
Experience
11 Years
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Experience
Skills
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architecture
arm
ARM Architecture
Automation
Automotive
C
C (Programming Language)
C++
Communication
Design
Embedded C
Embedded Systems
Field-Programmable Gate Arrays (FPGA)
FPGA
GSM
I2C
Internet Protocol Suite (TCP/IP)
LabVIEW
Linux
Microcontrollers
MSP430
Programming
Project Planning
Pspice
Python
Rail Transport
railroad
Railroad Engineering
Railway Systems
SIM900A
soc
Software Design
Software Engineer
Strategic Planning
TCMS
TCP/IP
test
test cases
testing
Transportation
Troubleshooting
Trucking
Verilog
Windows
Xilinx
Contact Details
Email (Verified)
harXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXX63Education
daiict
Bachelor of Technology (B.Tech.)
2009 - 2013
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