About

Himanshu M. is an Associate Application Engineer at Siemens EDA, with a keen interest in pursuing a career in the semiconductor industry. With 4.69 years of relevant experience, he has worked as a consultant in the Cadence Product Validation team, where he was responsible for writing SV test cases for feature validation. Himanshu has also worked as a contractor in SNPS CDC team on Spyglass and CDC. Previously, Himanshu was an intern in the DDR PHY Verification Team at Synopsys, where he worked on infra updates, removal of warnings ULCO and WMIA-L from the logs of DFI VIP, and worked with different Mantis debug for the enabling of different DDR protocol checks. He also worked on DDR5 LRDIMM debugs related to Sidebands, DDR4 enhancement in improving the code lines, and understanding of DDR5 and DDR4 timing protocol checks. Himanshu has also worked on the integration of DFI VIP to UVM 1.2 version, enable DDR4 VG VIP protocol checks with SG DDR PHY Design IP, worked on NVDIMM Support Verification in PHY, worked on DFI STANDALONE Verification, and worked on linking of HVP files to the latest Spec Version. Himanshu holds a B.TECH degree in Electronics and Communications Engineering from Inderprastha Engineering College. He completed his schooling from SBP DAV Centenary Public School. His technical skills include test, integration, and infra. Himanshu is currently working on Questa Sim and Visualizer at Siemens.