Aldec Rivera pro

Application-Specific Integrated Circuits (ASIC)

ASIC

ASIC Design

ASIC Verification

Assertion Based Verification

C

C (Programming Language)

C++

Cadence Virtuoso

Code Coverage

Constraint Programming

CRM

Customer Relationship Management (CRM)

DDR

DDR3 sdram memory controller

Debugging

eda

Field-Programmable Gate Arrays (FPGA)

FPGA

FPGA Design

functional coverage

Functional Verification

Java

Jira

Linux

linux

Matlab

Microsoft Excel

Microsoft Office

Natural Language Processing (NLP)

Perforce

Perl

Protocol

Python

router 1x3 design

RTL

RTL Coding

RTL Design

RTL Development

RTL Verification

SAP

scoreboard

spi protocol

Static Timing Analysis

SV

system verilog assertion

SystemVerilog

Universal Verification Methodology (UVM)

Verification and Validation (V&V)

Verilog

Very-Large-Scale Integration (VLSI)

VHDL

Windows

Xilinx ISE