About

Karthik Majeti is a highly skilled Design Verification expert with over 15 years of relevant experience. He has a proven track record of successfully leading and managing IP/Sub-system verification teams. His expertise lies in Functional Verification, RTL design, and Gate Level Simulation. Karthik has excellent programming skills in SV, E, Verilog, and SV Assertions. Karthik has a good domain knowledge of sub-system/soc verification, camera Image sensor, Display Sub System (Hardware Accelerators for Display Processing), and exposure to Cache and Processor Memory Subsystem Architecture. He is an expert in UVM based verification methodology with C-model integration and architecture/building of verification environments at both IP and subsystem level. Karthik is currently working as a Senior Staff Engineer at Samsung, where he is responsible for the design verification of Image sensor SoC and Imaging IP DV. He has also worked as a Lead Engineer at Samsung and a Senior Design Engineer at Texas Instruments, where he was responsible for the Design Verification of Display Controller IP and its modules. Karthik is highly proficient in Mobile, Integration, and Senior Software Engineering. He actively participates in hiring and building new teams and has very good experience in intra-company customer communication. He has provided support to the SOC, Silicon Validation, and software teams on IP related issues. Overall, Karthik is a highly skilled and experienced Design Verification expert with a strong track record of success. He would be a valuable asset to any organization looking to improve their verification processes.