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lisa ayres

senior physical design engineer

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About

Lisa Ayres is a highly experienced Senior Physical Design Engineer currently working at Intel. With over 25 years of relevant experience, Lisa has established herself as a seasoned professional in the industry. Her current role at Intel has allowed her to showcase her expertise in physical design engineering, where she has been responsible for designing and implementing complex circuits for various products. Prior to her current role, Lisa has worked with Encore Semi and Synapse Design as a Senior Physical Design Engineer and Assistant Director of Physical Design Engineering, respectively. Her experience in these companies has allowed her to work on a wide range of projects, from designing and implementing high-performance circuits to optimizing power and area. Lisa's educational background includes a degree in Computer Engineering from Tampa Technical Institute. Her educational training combined with her years of experience has equipped her with a strong foundation in physical design engineering. Lisa is known for her exceptional analytical skills and attention to detail. She has a proven track record of delivering high-quality work within tight deadlines. Her ability to work collaboratively with cross-functional teams has allowed her to build strong relationships with her colleagues and clients. In her personal life, Lisa is an avid traveler and enjoys exploring new cultures. She is also passionate about giving back to her community and volunteers at various non-profit organizations. Lisa's dedication to her work, combined with her personal values, makes her an asset to any team she works with.

Education

tampa technical institute

Companies

intel

encore semi

synapse design

cyient

freescale semiconductor

motorola

ibm

Experience

27.1 Years

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Experience

senior physical design engineer

intel | santa clara, california, united states

2016 - 2022

senior physical design engineer

encore semi | san diego, california, united states

2015 - 2016

assistant director of physical design engineering

synapse design | santa clara, california, united states

2011 - 2015

asic and physical design engineer

cyient | hyderabad, andhra pradesh, india

2010 - 2011

motorola circuit and physical design engineer

freescale semiconductor | austin, texas, united states

2004 - 2009

circuit and physical design engineer

motorola | chicago, illinois, united states

1994 - 2004

functional test engineer

ibm | new york, new york, united states

1992 - 1994

Skills

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analog

analog circuit design

application specific integrated circuits

asic

cadence

circuit design

cmos

debugging

Design

dft

drc

eda

floorplanning

functional verification

ic

integrated circuit design

integrated circuits

logic synthesis

low power design

microprocessors

mixed signal

physical design

place

place and route

semiconductor industry

semiconductors

signal integrity

soc

static timing analysis

system on a chip

systemverilog

tcl

timing closure

verilog

vhdl

vlsi

Contact Details

Email (Verified)

lisXXXXXXXXXXXXXXXet

Mobile Number

+15XXXXXXX52

Education

tampa technical institute

2005 - 2010

tampa technical institute

1989 - 1992

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