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Mahesh Parmar
Formal Verification, SMTS at AMD
Education Overview
Companies Overview
• amd
• synopsys
• tata
Experience Overview
13.3 Years
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Experience
Skills
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AMBA AHB
ASIC
asic
Assertions
C++
CAE
Compilers
Coverages
Debugging
Design
Digital Electronics
EDA
eda
Electronics
Field-Programmable Gate Arrays (FPGA)
Formal Verification
FPGA
Functional Verification
I2C
IP
Logic and Reasoning
Logic Design
Low Power Design
Low-power Design
Mobile
ModelSim
modelsim
NCSim
Networking
Open Verification Methodology
Perl
Regression Testing
regression testing
RTL coding
RTL design
rtl design
Simulations
simulations
soc
Software
Software Engineer
Static Timing Analysis
SV
SystemVerilog
TCL
Tcl Tk
Tcl-Tk
test
Testing
testing
Universal Verification Methodology
Universal Verification Methodology (UVM)
Universal Verification Methodology Uvm
UVM
VCS
Verification languages
Verilog
Veritas Cluster Server
Very-Large-Scale Integration (VLSI)
VHDL
VLSI
vlsi
VMM
Xilinx
Contact Details
Email (Verified)
er.XXXXXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXX72Education
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Frequently asked questions
What company does Mahesh Parmar work for?
Mahesh Parmar works for amd
What is Mahesh Parmar role in his workplace?
Mahesh Parmar's role in his workplace is Senior Member of Technical Staff
What is Mahesh Parmar's tenure in his workplace?
Mahesh Parmar's tenure in his workplace is 3.17 years
What is Mahesh Parmar's total experience?
Mahesh Parmar's total experience is 13.25 years
What is Mahesh Parmar's LinkedIn profile?
What is Mahesh Parmar's email address?
What is Mahesh Parmar's phone/WhatsApp number?
What companies has Mahesh Parmar worked with?
Mahesh Parmar has worked with amd, synopsys, tata
What are some of Mahesh Parmar's skills?
Mahesh Parmar has skills in AMBA AHB, ASIC, asic, Assertions, C++, CAE and more.
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