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Muhammad Umer
Senior Design Engineer at RWR Private Limited
About
Muhammad Umer is a highly skilled Senior Design Engineer with over 12 years of experience in the field of communication and embedded systems. He is currently working at RWR Private Limited, where he has worked on RTL design and verification of digital design projects. He has also worked on Zynq Ultra-scale MPSoc development boards, designed schematics, and brought up custom design boards. Muhammad has extensive experience in designing and testing JESD204 complaints ADC on Zynq Ultra-scale MPSoC. He has designed the schematic of custom boards that include power supply for zynq-7000, DDS ad9914, ADCs AD7476, level translators, USB to UART chip, PLL IC, and RF filters. He has also debugged custom boards and made them functional by verifying all interfaces. Muhammad has worked with different IPs such as ADC HMCAD1520, DAC AD9739-A, PLL 4355, 4350, DDS AD959, AD9914, AD9915, and has done board level testing of digital design projects (RTL) on FPGA (zynq-7000) including Zedboard, Picozed board, AD9915 (DDS), and Vertix 4. Prior to his current role, he worked as a Senior Lecturer at the University of Central Punjab (official), where he taught computer architecture, computer organization & assembly language, and digital logic design. He also supervised FYP's in Android Gaming. He has also worked at Open-Silicon Pakistan as a Senior Design Engineer, where he designed JEDEC DDR3/4 parameterize design of DDR3/4 protocol layer and SDRAM layer that supports all types of bursts (1-16), memory configuration (1GB,2GB,4GB,8GB,16GB,32GB), and memory widths (8,16,32,40,64, & 72). He has also designed RTL for DDR3/ DDR4 protocol and added different standard features in RTL, including 16 outstanding transactions support, port coherency, ECC read modify write, exclusive locked transactions, CRC, burst support (1-16). He has also verified JEDEC DDR3/4 memory controller in Universal Verification Methodology (UVM) verification environment and coordinated with the verification team and helped them to write different test patterns for DDR3/4 memory controller. Muhammad holds an MS in communication system engineering from SEECS-NUST and
Education Overview
• seecsnust
• uettaxila
Companies Overview
• rwr private limted
• university of central punjab official
• seecsnust
• opensilicon pakistan
• palmchip coorporation
• andor logic
• cefarseecs
Experience Overview
11.9 Years
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Experience
Skills
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Algorithms
Android
architecture
Assembly Language
C
C#
C++
Cadence
Communication
Design
Embedded Systems
Field-Programmable Gate Arrays (FPGA)
FPGA
IP
Java
Linux
Logic and Reasoning
Matlab
Microcontrollers
ModelSim
Multisim
PCB design
Programming
Pspice
Research
Research and Development (R&D)
Research Scientist
rtl design
Simulations
Simulink
System Design
TCP/IP
test
testing
Verilog
VHDL
Visual Studio
Xilinx
Contact Details
Email (Verified)
08mXXXXXXXXXXXXXXXXXXXXpkMobile Number
034XXXXXXX59Education
seecsnust
MS comunication System Engineering
2008 - 2010
uettaxila
Bsc Electrical Engineering (Hons)
2004 - 2008
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