About

Munish Garg is an experienced Analog Design Engineer with a focus on mixed signal circuit design, PLL, LC-VCO, and SerDes. He is currently working as an MTS at INVECAS, where he has designed LC-VCO and PLL circuits in 22nm and worked on 32G DFE-15 tap Quad phase at 22nm. He has also designed Crystal Oscillator circuits at 16nm and 40nm. Munish has a strong skill set in Analog design, SerDes, PLL, LC-VCO, and Crystal Oscillator design. He has worked as a Senior Analog Design Engineer at NXP Semiconductors and as an Analog Design Engineer at the same company in the past. Munish has a Master's degree in Microelectronics and VLSI from IIT, where he completed his studies in 2014. He also holds a Bachelor's degree from NIT Kurukshetra, which he completed in 2009. With 9.52 years of relevant experience, Munish is a highly skilled designer with expertise in a range of technologies. He is a valuable asset to any team and has a proven track record of success in the industry.