Analog Circuit Design

Automatic Test Pattern Generation (ATPG)

C

C++

CMOS Design

coverage debug

Design

DFT

DFT Scan Insertion and validation

Digital Circuit Design

Electronics

Gate Level Simulation

gls debug

Linux

Matlab

Microsoft Office

NI Multisim

Perl

PSpice

Python (Programming Language)

RTL/Gate Level DFT verification

Semiconductors

Senior Software Engineer

SoC/Subsystem/IP ATPG and Simulations

TCL

Tcl-Tk

Tcl/Perl/Python

tessent

tessent shell programming

Verilog

VHDL

VLSI Design

Xilinx ISE