About

Pallavi Atha is a Lead Member of Technical Staff - Formal Product Engineer at Siemens EDA, formerly known as Mentor Graphics. With a relevant experience of 9.62 years, Pallavi is skilled in HDLs such as Verilog and VHDL, HVLs including System Verilog (OVM/UVM Methodologies) and SVA, Scripting Languages like Tcl TK, Shell & Perl, and Standards like DO254 and ISO26262. She is also proficient in various protocols such as UART, SPI, I2C, AXI, AMBA, CAN, and Ethernet, and EDA tools like Modelsim, QuestaSim, NCsim, Xilinx ISE, Questa Formal Apps, HDL Designer, and Reqtracer. Pallavi has a good understanding of C++ and Embedded C and is well-versed in documentation tools such as Oxygen Authoring XML, Adobe Acrobat, and Framemaker. Pallavi's soft skills include excellent communication and presentation skills, leadership qualities, and the ability to take ownership of her work. She is also capable of bridging the gap between the engineering technical team and the sales/marketing team. Pallavi has experience in providing documentation to present the company's white paper. Before joining Siemens, Pallavi worked as an Application Engineer at Mentor Graphics and as a Contract Engineer - ASIC at Freescale Semiconductor. She holds a Master of Technology (MTech) in VLSI and a Bachelor of Technology (BTech) in Electrical, Electronics, and Communications Engineering from Suresh Gyan Vihar University. Pallavi also attended Army School Narangi and Kendriya Vidyalaya. Overall, Pallavi is a skilled software engineer and designer with expertise in various technical skills and protocols. She possesses excellent soft skills and has experience in providing documentation to present the company's white paper.