About

Piyush Shriwastava is a highly skilled Senior Design Engineer with over 10 years of experience in the field. Currently working at AMD, he has a strong background in System Verilog, Verilog, and VHDL. He also possesses a good understanding of SoC level Test bench Architecture and Verification flow at SoC level. Piyush has a deep understanding of FPGA, ASIC, and SoC Design & Verification Life Cycles, and is an expert in System Verilog UVM/OVM/VMM based ASIC Design Verification on assertion-based Constrained Random Verification (CRV) with Functional and Code coverage and RTL (Verilog HDL & VHDL) development. He has a good knowledge in functional verification and is familiar with basic concepts of C, C++, and Object-Oriented Methodology. In addition to his technical skills, Piyush is also a great team player, providing technical support to team members whenever needed. He has worked with some of the biggest names in the industry, including Intel and Graphene Semiconductor, where he served as a Design Engineer and Senior Member of Technical Staff, respectively. Piyush holds a Bachelor of Technology degree in Electronics & Communication Engineering from Motivational Pathway, which he obtained in 2012. He is also well-versed in protocols like UART, SPI, I2C, and AXI, and has a sound knowledge of PERL. Overall, Piyush is a highly motivated and skilled engineer with a passion for designing and developing cutting-edge technologies. He is always eager to learn and grow, making him an invaluable asset to any team.