About

Pranay Vissa is a Member Of Technical Staff at Astera Labs with over 8 years of relevant experience in the field of software engineering, testing, research, and infrastructure. He completed his Master of Science (M.S.) in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign in 2015, and prior to that, he completed his Bachelor's Degree in Electronics and Communication Engineering from IIIT Allahabad in 2009. He also holds a High School degree in Science from Abu Dhabi Indian School, Abu Dhabi. Pranay started his career as a Graduate Research Assistant at the University of Illinois at Urbana-Champaign, where his research led to the successful acceptance of work at Design Automation Conference (DAC '15). Later, he joined Innovium as a Member Of Technical Staff, where he contributed to different teams and worked through various phases of developing and testing the chip. At Innovium, he modeled packet allocation and scheduler in datapath blocks, designed a tool to help manage the specification of all config and status registers, generated RTL code for the same, designed timers, counters, and interrupt handlers used in various blocks in the chip, and verified accesses to all registers by running read-write pattern based tests. He also helped develop and test ECC error detection and correction on the SDK, and developed test infrastructure in python and pytest for emulation and silicon validation efforts. Pranay chose to work at a startup over a big firm to be instilled with the value of hard work, ownership, responsibility, and self-sustainability. He enjoys cycling (road), hiking, playing soccer and tennis, and reading biographies and checking out new coffee spots outside the office. Pranay is skilled in software engineering, testing, Python, research, and infrastructure. He is open to discussing his past experiences, interests, and future opportunities.