About

Rahul Behl is a skilled Senior Design Engineer with over 7 years of experience in the digital design and verification field. He graduated from BITS Pilani Goa Campus with a degree in Electronics and Instrumentation Engineering. Rahul is currently working at ARM as a CPU Design Engineer and is responsible for defining and implementing the micro-architecture for the next generation ARM trace architecture. He has gained expertise in Universal Verification Methodology (UVM), Verilog for Synthesis, RTL-debugging, and Processor designing. In his previous roles at ARM, Rahul worked with the Testbench and Infrastructure Development Team, where he owned and maintained various internal UVM based Testbench components. He was involved in the functional verification of ARM's A55 CPU using internal RIS tools, and helped with the development of various Testbench irritators to further stress the CPU units. Rahul has also worked on developing micro-architecture specific test scenarios and helped generate stimulus to target designer concern areas. Rahul's education history includes a BE(Hons) degree in Electronics and Instrumentation from BITS Pilani, Goa Campus, and he also attended JK Public School. His tech stack includes expertise in infrastructure, testing, and designing. Rahul is enthusiastic about Computer Architecture, Processor Micro-architecture, Digital design, and allied fields. He has gained skills essential to both Digital design and verification field and has constantly tweaked stimulus to hit coverage holes. He is a driven team player with a passion for learning and excelling in his field.