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Rajashekhar Reddy
Lead Engineer at Qualcomm
About
Rajashekhar Reddy is a Lead Engineer at Qualcomm with a passion for algorithms, programming, and operating systems. He has an extensive experience of 6.8 years in embedded software development and has completed his M.Tech in Computer Science from NIT Trichy. Currently, he is leading the camera software team for Qualcomm Snapdragon Processor, where he has actively contributed to multiple software modules such as face detection, facial attribute features, stabilization algorithm, and FPS-based skip logic for face detection. Rajashekhar has improved the existing face detection module design by making it scalable and flexible, which significantly improved code maintenance and removed redundancy. He has also incorporated GPU OpenCL and FastCV functionalities into camera use cases, which improved overall latency and power, especially for Qualcomm low-tier chipsets. His expertise in OS memory management and multi-threading concepts has helped him in resolving multiple critical issues related to the camera framework. In his past role as a Senior Engineer and Engineer at Qualcomm, Rajashekhar gained a good understanding of camera post-processing modules and implemented JPEG rotation with software with less processing time. He has filed a patent for face detection, which will help in reducing overall power in the camera module when face detection is ON. He has also developed multiple features that helped in decreasing false positives and increasing the performance of the face detection module. Rajashekhar has a Master's degree in Computer Science from NIT Tiruchirappalli and has a tech stack that includes Senior Software Engineer, Software Engineer, test, Python, and Mobile. He has relevant experience of 7.78 years, during which he has resolved numerous customer critical issues of Oppo, Samsung, Vivo, One plus, Motorola, and supported Xiaomi camera critical features by directly working in Xiaomi Head office in Beijing. Rajashekhar's idea of implementing Single input and multiple output downscale functionality has improved overall latency by 35% and DDR BW as well, and later the idea got patented.
Education Overview
• nit tiruchirappalli national institute of technology tiruchirappalli
• sreenidhi institute of science and technology
Companies Overview
• qualcomm
• infosys
Experience Overview
10.3 Years
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