Rajath Patil
Post Silicon Validation Engineer | ATE | Digital Electronics | Analog Electronics | Verilog HDL | 2021 Graduate BE ECE
Education
• sahyadri college of engineering management
Companies
• tessolve
Experience
2.9 Years
Experience
Skills
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Digital Electronics
Electronics
Verilog
Contact Details
Email (Verified)
rajXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXX92Education
sahyadri college of engineering management
Bachelor of Engineering - BE
2017 - 2021
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