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Ratul Banerjee
Senior Software Engineer @ Siemens EDA | Performance Optimization, Gate-Level Simulation
Education Overview
• iit kharagpur
Companies Overview
• siemens
• mentor graphics
• synopsys
• ghent university
• cisco
• universitat politcnica de valncia upv
Experience Overview
12.2 Years
Find anyone’s contact
Experience
Skills
Boost your visibility and stand out to employers with referrals from your LinkedIn connections.
Algorithms
Automation
Boost C++
C
C++
ClearQuest
Code Coverage
Consulting
CVS
Data Structures
Design
Design Patterns
Digital Electronics
EDA
eda
Embedded Systems
Emulation
Formal Verification
functional coverage
Functional Verification
GNU Debugger
infra
Infrastructure
IP
Linux
Machine Learning (ML)
ModelSim
Network Architecture
Network Function Virtualization
Optical Network
optimization
Perl
Questa
rtl design
scalability
simulations
soc
Software Defined Networking
Software Engineer
SystemVerilog
UCDB
Universal Verification Methodology (UVM)
Valgrind
Verilog
VHDL
Contact Details
Email (Verified)
ratXXXXXXXXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXX14Education
iit kharagpur
Master of Technology (M.Tech.)
2010 - 2012
iit kharagpur
Bachelor of Technology (B.Tech.)
2007 - 2010
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