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Ritesh Surana
Silicon Validation Engineer @ Google | Ex-Intel | Ex-HPE
Education Overview
• pes university
• agarwal vidya vihar surat
• ryan international school surat
Companies Overview
• intel
• hewlett packard
Experience Overview
6.1 Years
Find anyone’s contact
Experience
Skills
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Application Development
Bare metal
Boundary Scan
C (Programming Language)
Data Structures
Embedded Systems
Emulation
Field-Programmable Gate Arrays (FPGA)
Firmware
Genz
GitHub
GPU
I2C
IAR Embedded Workbench
Information Technology
Java
Joint Test Action Group (JTAG)
Leadership
Linux
Microsoft Excel
Microsoft PowerPoint
Mqtt
Post silicon
Power Management
Pre silicon
Putty
Python (Programming Language)
Silicon Validation
SMBus
Soc bootflow
Soc debug
Software Engineer
System Software
Verdi
Contact Details
Email (Verified)
ritXXXXXXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXXXXEducation
pes university
Bachelor of Engineering - BE
2014 - 2018
agarwal vidya vihar surat
Science
2012 - 2014
ryan international school surat
1999 - 2012
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