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Rohit Banerjee
Senior Design Engineer at AnDapt Technologies | UCLA | Bits Pilani
About
Rohit Banerjee is a skilled SoC Analog Design Engineer at Intel Corporation, with over 4 years of relevant experience in the field. He holds a Master of Science degree in Electrical and Computer Engineering from the University of California, Los Angeles, and a Bachelor of Engineering (Honors) in Electrical and Electronics Engineering from Birla Institute of Technology and Science, Pilani. Rohit is a highly motivated individual with a passion for analog circuit design in a digital world. He is currently working in Intel's Devices Development Group (DDG), where he is responsible for designing low power clocking architecture for High Speed I/O DDR Gen 7 50GBps capable Physical Layer. His duties include duty cycle correction, duty cycle adjustors, duty cycle detectors, clock cross over circuits, phase detectors, programmable delay lines, and clock gating. Prior to his current role, Rohit worked as an Analog/Mixed Signal Design Engineer in Intel's Mixed-Signal IP Solutions Group (MIG), where he worked on the schematic and layout of various High-Speed I/O blocks in the PCIe Gen 5 32GBps capable Physical Layer. Rohit has also worked as a Research Assistant at the Indian Institute of Science, where he was part of the Advanced Nanoelectronic Devices Lab. His project involved working on Graphene Transistors for high-frequency applications and post-silicon DC/RF characterization and debug work of graphene transistors. He was responsible for pushing the cutoff frequency in the terahertz range using equipment such as semi-automatic probe stations, network analyzers, source measure units, parameter analyzers, switching matrix, CV meter, and software such as Velox, MATLAB, ICCAP, ACS, WaferPro, Origin Pro, and WinCal XE. Rohit's technical skills include analog/mixed signal circuit design, research, and computer vision. He is a team player with excellent communication skills and a strong work ethic. He is always eager to learn and stay up-to-date with the latest technological advancements in his field.
Education Overview
• university of california los angeles
• bits pilani birla institute of technology and science
Companies Overview
• intel
• indian institute of science
• texas instruments
Experience Overview
5 Years
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Altium Designer
Analog Circuit Design
architecture
Automated Characterization Suite (ACS)
C
Cadence Virtuoso
Characterization
Computer Vision
CST Microwave Studio
Dance
Deep Learning
Design
designer
Electrical Engineering
Electronics
Football
ICCAP
Integrated Circuits (IC)
IP
Leadership
Management
Matlab
matlab
Microsoft Office
ModelSim
Multi frequency CV meters
Neural Networks
Parameter Analysers
PSpice
Python (Programming Language)
Radio Frequency (RF)
Research and Development (R&D)
Semiconductors
soc
Vector Network Analyzers
Verilog
Very-Large-Scale Integration (VLSI)
WaferPro Express (WPE)
Xilink ISE
Contact Details
Email (Verified)
rohXXXXXXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXX33Education
university of california los angeles
Master of Science - MS
2018 - 2020
bits pilani birla institute of technology and science
Bachelor of Engineering (Honors)
2013 - 2017
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