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sarat dasika
hardware design validation engineer
About
Sarat Dasika is a highly skilled hardware design validation engineer with over 10 years of relevant experience in the industry. Currently working at Qualcomm, he holds the same position of hardware design validation engineer. In his current role, Sarat is responsible for developing and executing validation plans for hardware designs, ensuring that they meet the required standards and specifications. Prior to joining Qualcomm, Sarat worked at Optellent, Inc. as a hardware test and validation engineer. There, he was involved in designing and executing validation plans for hardware products, ensuring they meet the required standards and specifications. Sarat holds a Bachelor's degree in Electronics and Communication Engineering from Jawaharlal Nehru Technological University, India, and a Master's degree in Electrical Engineering from San Jose State University, California. He has a strong technical background and is proficient in various tools and technologies related to hardware design validation. Sarat's technical expertise includes testing and validation of hardware designs, debugging and troubleshooting hardware issues, and developing test plans and methodologies. He has a solid understanding of various testing methodologies and has experience working with a wide range of hardware products. Sarat is a highly motivated and dedicated professional who is committed to delivering high-quality work. He is a team player and works collaboratively with others to achieve common goals. With his strong technical skills and experience, Sarat is an asset to any organization he works with.
Education Overview
• san jose state university
• jawaharlal nehru technological university
Companies Overview
• qualcomm
• optellent inc.
Experience Overview
11.9 Years
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Experience
hardware test and validation engineer
optellent inc. | san jose, california, united states
2012 - 2016
Skills
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amba ahb
asic
c
c++
debugging
Design
design vision
device characterization
device drivers
embedded systems
firmware
fpga
hardware
Hardware
i2c
integrated circuit design
labview
logic analyzer
microcontrollers
mixed signal
modelsim
perl
protocol analyzer
rs232
rtl design
signal integrity
simulations
soc
spectrum analyzer
synopsys tools
synopsys vcs
system verilog
systemverilog
tdr
test
testing
usb
validation
verilog
vhdl
vlsi
vna
Contact Details
Email (Verified)
shaXXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXXXXEducation
san jose state university
2010 - 2012
jawaharlal nehru technological university
2005 - 2009
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