About

Shermeen Aslam is a VIP R&D engineer at Cadence Design Systems with over 5 years of relevant experience in the field of electronics and communications engineering. Currently serving as a Software Engineer I, Shermeen is responsible for designing and developing software transport layers for STP hosts, as well as verifying UFS command sets through UVM sequences. Prior to her current role, Shermeen worked as an AVIP engineer (consultant) at Mentor Graphics where she focused on standard storage protocols like UFS and SATA. She designed and developed the transport layer of UFS host initiator and also designed the SATA STP host interface architecture. Her experience also includes developing SATA software transport layers for STP hosts. Shermeen's academic background includes a Bachelor's degree in Technology from Jamia Millia Islamia, where she majored in Electronics and Communications Engineering. She also completed her 12th grade from St. Paul Senior Secondary School, focusing on Physics, Chemistry, and Maths. Shermeen's technical skills include software engineering, and she is well-versed in various programming languages and tools. She is a dedicated and driven professional who is always looking to expand her knowledge and skills. Her experience and expertise make her a valuable asset to any team she works with.