About

Shreyansh Mishra is a highly skilled Multimedia STA Engineer with a passion for VLSI, Digital Electronics, HDL(verilog & system verilog), physical design, and digital design/ verification. He is a B.Tech. ECE 2020 graduate from IIIT ALLAHABAD and has gained valuable work experience in the field of VLSI. Shreyansh is a highly motivated individual with a keen eye for detail and a strong desire to achieve perfection. Shreyansh's skills include System Verilog, Verilog, UVM, C, OOP, TCL, Digital Design & Verification, and he has experience working with Primetime, Tempus, Quantus, Catapult HLS, QuestaSim, Xilinx Vivado, Modelsim, cadence virtuoso, and Matlab. He is also proficient in Linux and Windows platforms. Currently, Shreyansh is working at Qualcomm as an Associate Engineer in the Multimedia STA team. Prior to this, he worked as a Software Engineer at Cadence Design Systems in the USB4 VIP R&D team and as a Catapult HLS QA Intern at Mentor Graphics in the Catapult High Level Synthesis QA team. Shreyansh's education includes a Bachelor of Technology in Electronics and Communication Engineering from IIIT ALLAHABAD in 2020. He has 2.78 years of relevant experience in the field of C, Software Engineering, and QA. Shreyansh is a highly motivated individual who believes in gradual progress towards perfection. He is a team player and is always willing to go the extra mile to achieve his goals. With his strong technical skills and experience, he is an asset to any organization that he is a part of.