About

Shuo Zhang is a highly experienced Engineer with a focus on FPGA/ASIC Design Verification. He is currently a Senior Hardware Engineer at Waymo, where he is responsible for designing and verifying complex hardware systems. With almost a decade of experience in the industry, Shuo has an impressive track record of delivering innovative solutions to some of the most challenging problems in the field. Prior to joining Waymo, Shuo worked as a Software Engineer at F5, where he was responsible for accelerating Redis on FPGA and FPGA Design Verification. He also worked as a Hardware Engineer at Oracle, where he was responsible for Chipset Design Verification. Throughout his career, Shuo has gained extensive experience in both software and hardware engineering, making him a well-rounded engineer with a unique skill set. Shuo holds a Master of Science (M.S.) degree from the University of Southern California and a Bachelor's degree from Northeastern University (CN). He has also completed a program at UCSC Extension Silicon Valley, where he further honed his skills in engineering. Shuo is proficient in a variety of tech stacks, including Software Engineering and Redis. He is a highly motivated and detail-oriented individual who is always striving to improve his skills and knowledge. With almost a decade of relevant experience, Shuo is a valuable asset to any team in need of a skilled Engineer.