About

Sumit Vyas is a highly skilled Staff Engineer with over 10 years of experience in the VLSI industry. He has a proven track record of success in leading and delivering high-frequency 5G Modem projects, handling multi-million design and team sizes of up to 15+ people with multiple power domain challenges. Sumit has also led and delivered multiple SoC STA projects for Qualcomm, handling 10+ SoCs across 350+ corners. Sumit's hands-on experience in working on multi-power domain design in PnR in Qualcomm, working at GHz, and physical design relevant experience with various technology nodes and EDA tools, makes him an expert in his field. He has always thrived on working on challenging designs and new methodologies, including multi-power domain designs in Qualcomm. Sumit's expertise extends to hardening ARM core complete RTL to GDS versions for high frequency as well as low power with performance ranging from 1.67 GHz to 800MHz. He has efficiently hardened DSP cores and worked on full chip timing closure and DDR3 timing interface. Sumit has worked with various tools, including PrimeTime, Cadence RTL compiler, Encounter, ETS, Cadence Innovus, Tempus, QRC, Voltus, Cadence CLP, Cadence LEC, etc. He has exposure to doing post-mask functional ECOs. Currently, Sumit Vyas is a Staff Engineer at Qualcomm, where he uses his expertise to lead and deliver high-frequency 5G Modem projects. Before his current role, he worked as a Senior Lead Engineer and Senior Engineer at Qualcomm, where he was responsible for doing SoC STA, handling multiple SoC STA functional and test mode closure. Sumit Vyas holds a Bachelor's degree in Electronics from DA-IICT, where he graduated in 2011. He is a Senior Software Engineer with 12.12 years of relevant experience.