About

Syed Farooq is a Design Verification Engineer at Apple, with over 11 years of relevant experience in the computer hardware field. He is currently pursuing a Master's degree in Computer Engineering at Purdue University, where he has also worked as a Graduate Teaching Assistant for Linear Circuits-II and a Pre-Calculus instructor. Farooq has previously worked as a SoC Design Integration Engineer Intern at Intel, where he was responsible for implementing and running Gate Level Simulation using System Verilog for identifying bugs in the finalized netlist before tapeout. He also worked on enhancements to register configuration for power/area optimizations using SystemRDL/SystemVerilog, and on various environment related scripts (Python/Perl) for compilation and running a suite of regressions. Farooq's education history includes a Master of Science (M.S.) in Electrical and Computer Engineering from Purdue University and a B.Tech in Electronics and Communications Engineering from the National Institute of Technology, Srinagar. He also has a Higher Secondary School degree in Science from Government SRML Higher Secondary School and a Secondary School degree from Shiksha Niketan High School. Farooq's tech stack includes Spring, Integration, and Python. He is deeply motivated and passionate about computer hardware and has experience in a broad variety of roles across education and software industry.