About

Tiben Che is an experienced Staff Hardware Engineer at Qualcomm with a strong background in digital system design. He is currently responsible for FPGA digital design for 5G prototyping including modem/M-MIMO system, architect definition, RTL design/debugging, FPGA timing/area/performance analysis, timing closure, and lab testing/supporting. Additionally, he is involved in 5G NR Decoder design for modem product. Prior to his current role, Tiben worked as a Senior Hardware Engineer at Qualcomm where he was responsible for digital design for 5G modem prototyping on FPGA, including architecture design, RTL modeling and verification, FPGA level integration, timing analysis and closure, performance evaluation, and lab supporting. He also worked as a Teaching Assistant for ECEN454 Digital Integrated Circuit Design and ECEN248 Digital Systems Design at Texas A&M University. Tiben holds a Doctor of Philosophy (Ph.D.) in Computer Engineering from Texas A&M University and a Master of Science (MS) and Bachelor of Science (BS) in Electrical and Electronics Engineering from Sichuan University. He possesses a strong technical skill set, including expertise in test, senior software engineering, and integration. With 6.20 years of relevant experience, Tiben is a highly skilled and accomplished hardware engineer with a proven track record of success in digital system design. He is a results-oriented professional who is committed to delivering high-quality work and achieving success in all his endeavors.