About

Vaibhav Surte is a senior design verification engineer with over 7 years of relevant experience. He is currently working with Qualcomm in the same capacity. Prior to this, he has worked with Cypress Semiconductor Corporation and Scalable Systems Research Labs Inc. as a senior design verification engineer and an independent contractor for ASIC design verification engineering, respectively. Vaibhav's educational background includes a Bachelor's degree in Electronics and Telecommunication Engineering from Jawahar Education Society's A.C. Patil College of Engineering, Mumbai, and a Master's degree in Electrical Engineering from Southern Methodist University, Dallas. He has also completed a diploma in Computer Engineering from KET's V.G. Vaze College of Science Arts, Commerce, Mulund, Mumbai. With a strong foundation in electronics and telecommunications engineering, Vaibhav has developed expertise in design verification and validation of digital and mixed-signal circuits. He has worked extensively on the verification of complex ASIC designs and has experience in developing and executing verification test plans, debugging failures, and analyzing coverage metrics. Vaibhav is a self-motivated individual with excellent problem-solving skills. He is a team player who can work collaboratively towards achieving common goals. He is passionate about keeping up with the latest trends in the industry and is always eager to learn new technologies and tools. Overall, Vaibhav Surte is a skilled design verification engineer with a proven track record of delivering high-quality results. He is a valuable asset to any organization looking for a dedicated and competent team member.