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Vijaytarang Narayana
Silicon architecture/micro-architecture : Silicon design for high performance.
About
Vijaytarang Narayana is a skilled Performance Architect with expertise in computer Architecture, Micro-Architecture and Custom IP design/ASIC design. With a Master of Science (MS) in Electrical and Electronics Engineering from the University of Wisconsin-Madison, Vijaytarang has worked with arm ISA and has experience in the design of multi-threaded cycle-accurate custom CPU core design. Currently working as a Silicon Engineer at AMD, Vijaytarang has previously worked as a Member Of Technical Staff at Nuvia and as a CPU Performance Architect at Samsung. At Samsung, he was responsible for the performance modeling and micro-architecture design of mid-core stages of the pipeline such as decode rename and dispatch for an arm ISA based CPU core. He also worked on multi-threaded core design along with power-efficient and performance-oriented core modeling. He analyzed various different architectural features and studied the power, area, and performance tradeoffs. He worked closely with the correlation and RTL teams to improve performance and power to maximize the perf per watt. Vijaytarang's technical expertise includes skills in CPU architect silicon architecture/micro-architecture, SoC, CPU, GPU, IP, and ASIC design for high performance. He has also worked with the memory and cache controller team. With a relevant experience of 3.44 years, Vijaytarang has a strong educational background and a range of technical skills that make him a valuable asset to any team.
Education Overview
• university of wisconsin madison
• bits pilani birla institute of technology and science
Companies Overview
• ascenium inc
• amd
• nuvia
• samsung
• samsung sarc acl
• qualcomm
• university of wisconsinmadison
• uwmadison college of letters science
• menza motors pvt. ltd.
• indian institute of technology delhi
Experience Overview
5.8 Years
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Skills
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architecture
arm
computer architecture
Design
Electronics
Hardware
IP
Senior Software Engineer
Software Engineer
Contact Details
Email (Verified)
vijXXXXXXXXXXXXXXXXomMobile Number
+91XXXXXXXXXXEducation
university of wisconsin madison
Master of Science - MS
2017 - 2019
bits pilani birla institute of technology and science
Bachelor’s Degree
2013 - 2017
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