About

Vineet Kumar is a highly skilled individual with expertise in Verilog, SystemVerilog, and UVM. He is currently pursuing a Master of Science in Mathematics and a Bachelor's in Electronics from BITS Pilani, Goa Campus. Vineet is currently working as a DV Intern at Samsung Semiconductor and as a VC Fellow at First Cheque. Vineet has previously worked as a Design Verification Engineer in the PMU DV team at Samsung. He has also been a member of the Wall Street Club BITS Goa. Vineet's education history includes a Bachelor of Engineering in Electronics and Instrumentation and a Master of Science in Mathematics from BITS Pilani, Goa Campus. With 0.19 years of relevant experience, Vineet is well-versed in the tech stack of Mobile. He is a motivated and dedicated individual who is always eager to learn and grow. Vineet's skills in Verilog, SystemVerilog, and UVM make him a valuable asset to any team.